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Quantity | Price (inc GST) |
---|---|
1+ | CNY260.080 (CNY293.8904) |
10+ | CNY210.890 (CNY238.3057) |
25+ | CNY185.850 (CNY210.0105) |
100+ | CNY173.320 (CNY195.8516) |
250+ | CNY160.790 (CNY181.6927) |
Product Information
Product Overview
AD9520-1 provides a multioutput clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. It is a serial interface that supports both SPI and I²C ports. An in-package EEPROM, which can be programmed through the serial interface, can store user-defined register settings for power-up and chip reset. It features 12 LVPECL outputs in four groups. Any of the 1.6GHz LVPECL outputs can be reconfigured as two 250MHz CMOS outputs. Application includes low jitter, low phase noise clock distribution, clock generation and translation for SONET, 10Ge, 10GFC, synchronous Ethernet, OTU2/3/4, forward error correction (G.710), clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs, high performance wireless transceivers ATE and high performance instrumentation, broadband infrastructures.
- Low phase noise, phase-locked loop (PLL), reference monitoring capability
- Automatic/manual reference holdover and reference switchover modes, with revertive switching
- Glitch-free switchover between references, automatic recovery from holdover
- Digital or analogue lock detect, selectable, automatic synchronization of all outputs on power-up
- SPI- and I²C-compatible serial control port, non-volatile EEPROM stores configuration settings
- VS is 3.3V (typ, 3.3V ± 5%, VS ≤ VCP ≤ 5.25V, TA = 25°C)
- Frequency range from 2270 to 2650MHz (VS = VS-DRV = 3.3V ± 5%, VS ≤ VCP ≤ 5.25V, TA = 25°C)
- Phase noise at 1KHz offset is -50dBc/Hz (typ, f = 2475MHz, VS = VS-DRV = 3.3V ± 5%, TA = 25°C)
- Pulse width high/low is 1.8ns (min, f = 2475MHz, VS = VS-DRV = 3.3V ± 5%, TA = 25°C)
- 64-lead LFCSP-VQ package, temperature range from -40°C to +85°C
Notes
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
Technical Specifications
Clock Generator
12Outputs
3.465V
64Pins
85°C
-
No SVHC (21-Jan-2025)
2.5GHz
3.135V
LFCSP-VQ-EP
-40°C
-
MSL 3 - 168 hours
Technical Docs (2)
Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:Philippines
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate