AD9680BCPZ-1000

AD9680 is a dual, 14bit, 1GSPS analogue-to-digital converter (ADC). The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The analogue input and clock signals are differential inputs. Each ADC data output is internally connected to two digital downconverters (DDCs). Each DDC consists of up to five cascaded signal processing stages: a 12bit frequency translator (NCO) and four half-band decimation filters. The DDCs are bypassed by default. Typical applications include communications, diversity multiband, multimode digital receivers (3G/4G, TD-SCDMA, W-CDMA, GSM, LTE), general-purpose software radios, ultrawideband satellite receivers, instrumentation, radars, Signals intelligence (SIGINT), DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers.

• 1.25V, 2.5V and 3.3V DC supply operation
• No missing codes and internal ADC voltage reference
• Flexible input range from 1.7V p-p nominal
• 2GHz usable analogue input full power bandwidth
• 95dB channel isolation/crosstalk and amplitude detect bits for efficient AGC implementation
• Differential clock input, integer clock divide by 1, 2, 4, or 8 and small signal dither
• DNL = ±0.5LSB, INL = ±2.5LSB, noise density = -154dBFS/Hz at 1GSPS
• ENOB of 10.8bits at 10MHz
• 67.2dBFS SNR and 67.1dBFS at fIN = 10MHz
• 64 lead LFCSP-EP package, operating temperature range from -40°C to 85°C

Notes

ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party