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Quantity | Price (inc GST) |
---|---|
10+ | CNY81.580 (CNY92.1854) |
25+ | CNY74.090 (CNY83.7217) |
100+ | CNY67.470 (CNY76.2411) |
250+ | CNY65.310 (CNY73.8003) |
1500+ | CNY64.300 (CNY72.659) |
Product Information
Product Overview
ADCLK925 (one input, two outputs) is an ultrafast clock/data buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. It feature full-swing emitter coupled logic (ECL) output drivers. For PECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For NECL (negative ECL) operation, bias VCC to ground and VEE to the negative supply. The inputs have centre tapped, 100 ohm, on-chip termination resistors. A VREF pin is available for biasing ac-coupled inputs. The ECL output stages are designed to directly drive 800mV each side into 50 ohm terminated to VCC − 2V for a total differential output swing of 1.6V. It is widely used in application such as clock and data signal restoration and level shifting, automated test equipment (ATE), high speed instrumentation, high speed line receivers, threshold detection, converter clocking etc.
- Propagation delay is 95ps typical
- Toggle rate is 7.5GHz typical
- Random jitter is 60fs rms typical
- On-chip terminations at both input pins
- Power supply range is 2.5V to 3.3V
- Input bias current is 20µA typical
- Operating temperature is -40°C to +125°C
- Package style is 16-lead lead frame chip scale package [LFCSP]
Notes
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
Technical Specifications
Clock & Data Buffer
2Outputs
3.63V
16Pins
125°C
-
No SVHC (21-Jan-2025)
7.5GHz
2.375V
LFCSP-EP
-40°C
-
MSL 3 - 168 hours
Technical Docs (1)
Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:Philippines
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate