74LVC2G17GV,125
Buffer, 74LVC2G17, 1.65 V to 5.5 V, TSOP-6
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| Quantity | Price (inc GST) |
|---|---|
| 5+ | CNY1.200 (CNY1.356) |
| 50+ | CNY1.100 (CNY1.243) |
| 100+ | CNY0.981 (CNY1.1085) |
| 500+ | CNY0.940 (CNY1.0622) |
| 1500+ | CNY0.922 (CNY1.0419) |
Product Information
Product Overview
The 74LVC2G17GV,125 is a dual non-inverting Buffer with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Inputs can be driven from either 3.3/5V devices. This feature allows the use of these devices as translators in a mixed 3.3 and 5V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
- High noise immunity
- CMOS low-power consumption
- Direct interface with TTL levels
- Complies with JEDEC standard
- 5V Tolerant input/output for interfacing with 5V logic
- Latch-up performance exceeds 250mA
- ±24mA Output drive
Applications
Industrial, Automation & Process Control, Signal Processing
Technical Specifications
Buffer, Schmitt Trigger
TSOP
6Pins
5.5V
742G17
125°C
-
No SVHC (25-Jun-2025)
74LVC2G17
TSOP
1.65V
74LVC
-40°C
-
MSL 1 - Unlimited
Technical Docs (2)
Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:United States
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate