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数量 | 价钱 (含税) |
---|---|
1+ | CNY49.390 (CNY55.8107) |
10+ | CNY43.220 (CNY48.8386) |
25+ | CNY35.820 (CNY40.4766) |
50+ | CNY32.100 (CNY36.273) |
100+ | CNY29.640 (CNY33.4932) |
250+ | CNY27.670 (CNY31.2671) |
500+ | CNY26.180 (CNY29.5834) |
产品信息
产品概述
The SN65LVDS390PW is a quad differential Line Receiver implements the electrical characteristics of low-voltage differential signalling (LVDS). This signalling technique lowers the output voltage levels of 5V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds and allow operation with a 3V supply rail. Any of the differential receivers provides a valid logical output state with a ±100mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1V of ground potential difference between two LVDS nodes. Additionally, the high-speed switching of LVDS signals almost always requires the use of a line impedance matching resistor at the receiving end of the cable or transmission media. The LVDT products eliminate this external resistor by integrating it with the receiver.
- Open-circuit failsafe
- Flow-through pin-out
- Integrated 110Ω line termination resistors on LVDT products
- Bus-terminal ESD exceeds 15kV
- 2.6ns Typical propagation delay time
- 100ps Typical output skew
- <lt/>1ns Part-to-part skew
- 630Mbps Signalling rate
- Green product and no Sb/Br
技术规格
LVDS 线性接收器
85°C
3.6V
16引脚
LVTTL
-
MSL 1 -无限制
-40°C
3V
TSSOP
LVDS
4bit
-
No SVHC (27-Jun-2018)
法律与环境
进行最后一道重要生产流程所在的地区原产地:Taiwan
进行最后一道重要生产流程所在的地区
RoHS
RoHS
产品合规证书