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数量 | 价钱 (含税) |
---|---|
1+ | CNY8.670 (CNY9.7971) |
10+ | CNY7.550 (CNY8.5315) |
50+ | CNY6.760 (CNY7.6388) |
100+ | CNY5.960 (CNY6.7348) |
250+ | CNY5.650 (CNY6.3845) |
500+ | CNY5.330 (CNY6.0229) |
1000+ | CNY4.210 (CNY4.7573) |
产品信息
产品概述
The SN74LVC16374ADGGR is a 16-bit edge-triggered D-type Flip-flop with 3-state outputs. It is designed for 1.65 to 3.6V VCC operation. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. On the positive transition of the clock input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs. A buffered OE input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
- Ioff Supports live insertion, partial-power-down mode and back-drive protection
- Supports mixed-mode signal operation on all ports
- Latch-up performance exceeds 250mA per JESD 17
- Green product and no Sb/Br
技术规格
74LVC163
4.5ns
24mA
TSSOP
上升沿
1.65V
74LVC
-40°C
-
MSL 1 -无限制
D
150MHz
TSSOP
48引脚
三态非反向
3.6V
74163
85°C
-
No SVHC (27-Jun-2018)
法律与环境
进行最后一道重要生产流程所在的地区原产地:Malaysia
进行最后一道重要生产流程所在的地区
RoHS
RoHS
产品合规证书