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数量 | 价钱 (含税) |
---|---|
1+ | CNY38.420 (CNY43.4146) |
10+ | CNY35.850 (CNY40.5105) |
25+ | CNY33.420 (CNY37.7646) |
50+ | CNY32.560 (CNY36.7928) |
100+ | CNY31.710 (CNY35.8323) |
250+ | CNY30.850 (CNY34.8605) |
500+ | CNY30.240 (CNY34.1712) |
产品信息
产品概述
AS4C16M16SA-7BCN 256Mb SDRAM is a high-speed CMOS synchronous DRAM containing 256Mbits. It is internally configured as 4 Banks of 4M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to SDRAM are burst-oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a read or write command. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. By having a programmable mode register, the system can choose most suitable modes to maximize its performance. It is well suited for applications requiring high memory bandwidth and particularly well suited to high-performance PC applications.
- Fast access time from clock: 5/5.4ns, fully synchronous operation
- Internal pipelined architecture, 4M word x 16-bit x 4-bank
- Programmable mode registers, CAS latency: 2 or 3, burst length: 1, 2, 4, 8, or full page
- Burst type: sequential or interleaved, burst stop function
- Auto refresh and self refresh, 8192 refresh cycles/64ms
- CKE power down mode, LVTTL interface
- Single +3.3V ±0.3V power supply
- 143MHz frequency
- 54 ball TFBGA package
- Commercial temperature range from 0 to 70°C
技术规格
SDRAM
16M x 16位
TFBGA
3.3V
0°C
-
256Mbit
143MHz
54引脚
表面安装
70°C
No SVHC (27-Jun-2024)
技术文档 (1)
法律与环境
进行最后一道重要生产流程所在的地区原产地:Taiwan
进行最后一道重要生产流程所在的地区
RoHS
RoHS
产品合规证书