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Quantity | Price (inc GST) |
---|---|
1+ | CNY84.530 (CNY95.5189) |
10+ | CNY79.330 (CNY89.6429) |
25+ | CNY74.120 (CNY83.7556) |
50+ | CNY68.910 (CNY77.8683) |
100+ | CNY63.690 (CNY71.9697) |
250+ | CNY58.480 (CNY66.0824) |
500+ | CNY53.270 (CNY60.1951) |
Product Information
Product Overview
The MC100EPT21DTG is a 3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator ideal for applications which requires the translation of a clock or data signal. Because LVPECL (positive ECL), LVDS and positive CML input levels and LVTTL/LVCMOS output levels are used, only 3.3V and ground are required. The VBB output allows this EPT21 to be cap coupled in either single-ended or differential input mode. When single-ended cap coupled, VBB output is tied to the D input and D is driven for a non-inverting buffer or VBB output is tied to the D input and D is driven for an inverting buffer. When cap coupled differentially, VBB output is connected through a resistor to each input pin. If used, the VBB pin should be bypassed to VCC via a 0.01F capacitor. For a single-ended direct connection use an external voltage reference source such as a resistor divider. Do not use VBB for a single-ended direct connection or port to another device.
- LVPECL/LVDS/CML Inputs
- LVTTL/LVCMOS Outputs
- 24mA TTL outputs
- Contains temperature compensation
- <gt/>275MHz Typical maximum frequency
Applications
Clock & Timing
Technical Specifications
2Inputs
1.4ns
TSSOP
3V
-40°C
Level Translator
-
No SVHC (27-Jun-2024)
24mA
8Pins
TSSOP
3.6V
85°C
-
MSL 3 - 168 hours
Technical Docs (1)
Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:Malaysia
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate