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| 数量 | 价钱 (含税) |
|---|---|
| 1+ | CNY17.880 (CNY20.2044) |
| 10+ | CNY16.790 (CNY18.9727) |
| 25+ | CNY16.360 (CNY18.4868) |
| 50+ | CNY16.150 (CNY18.2495) |
| 100+ | CNY15.710 (CNY17.7523) |
| 250+ | CNY15.640 (CNY17.6732) |
| 500+ | CNY15.580 (CNY17.6054) |
产品信息
产品概述
CY7C1021DV33-10ZSXIT is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking chip enable (active-low CE) and write enable (active-low WE) inputs LOW. Reading from the device is accomplished by taking chip enable (active-low CE) and output enable (active-low OE) LOW while forcing the write enable (active-low WE) HIGH. The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when the device is deselected (active-low CE HIGH), the outputs are disabled (active-low OE HIGH), the active-low BHE and active-low BLE are disabled (active-low BHE, active-low BLE HIGH), or during a write operation (active-low CE LOW, and active-low WE LOW).
- Pin-and function-compatible with CY7C1021CV33
- High speed, tAA=10ns
- VCC Operating supply current is 60mA max at 100MHz, VCC=Max, IOUT=0mA, f=fMAX=1/tRC
- Automatic CE power-down current-CMOS inputs is 3mA at Max VCC, CE>VCC-0.3V, VIN>VCC-0.3V/VIN<0.3V
- Data retention at 2.0V
- Automatic power-down when deselected, independent control of upper and lower bits
- CMOS for optimum speed and power
- Vcc is 3.3V ±0.3V
- 44-pin TSOP Type II package
- Industrial ambient temperature range from -40°C to +85°C
技术规格
异步SRAM
64K x 16位
44引脚
3.6V
-
-40°C
-
No SVHC (25-Jun-2025)
1Mbit
TSOP-II
3V
3.3V
表面安装
85°C
MSL 3 - 168小时
CY7C1021DV33-10ZSXIT 的替代之选
找到 1 件产品
法律与环境
进行最后一道重要生产流程所在的地区原产地:Philippines
进行最后一道重要生产流程所在的地区
RoHS
RoHS
产品合规证书