S25FL512SAGMFI011

S25FL512SAGMFI011 is a SPI multi-I/O, 3.0V, 512Mb FL-S flash memory. This device connect to a host system via an SPI. Traditional SPI single bit serial input and output is supported as well as optional two bit and four bit serial commands. This multiple width interface is called SPI multi-I/O or MIO. It supports for double data rate read commands for SIO, DIO, and QIO that transfer address and read data on both edges of the clock. The Eclipse architecture features a page programming buffer that allows up to 256 words (512 bytes) to be programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase algorithms. Executing code directly from flash memory is often called Execute-In-Place or XIP.

• 512Mb density, 65nm MIRRORBIT™ Process Technology, 133MHz speed
• MIRRORBIT™ technology - that stores two data bits in each memory array transistor
• Eclipse architecture - that dramatically improves program and erase performance
• SPI Clock polarity and phase modes 0 and 3, core supply voltage range from 2.7V to 3.6V
• Normal, fast, dual, quad, fast DDR, dual DDR, Quad DDR
• Common flash interface (CFI) data for configuration information
• Quad-input page programming (QPP) for slow clock systems
• Automatic ECC -internal hardware error correction code generation with single bit error correction
• 100,000 program-erase cycles minimum, 20 year data retention minimum
• 16-pin SO package, industrial temperature range from -40°C to + 85°C