S25FS512SDSBHV213

S25FS512SDSBHV213 is a 512Mb FS-S flash memory. This connects to a host system via a serial peripheral interface. Traditional SPI single bit serial input and output is supported as well as optional two-bit (Dual I/O or DIO) and four-bit wide Quad I/O (QIO) or quad peripheral interface serial commands. This multiple-width interface is called SPI Multi-I/O or MIO. In addition, there are double data rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock. The FS-S Eclipse architecture features a Page Programming Buffer that allows up to 512bytes to be programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase algorithms. By using S25FS512S devices at the higher clock rates supported, with Quad or DDR-Quad commands, the instruction read transfer rate can match or exceed traditional parallel interface, asynchronous, NOR flash memories, while reducing signal count dramatically.

• 80MHz DDR speed, 1.7V to 2.0V supply voltage range
• Serial peripheral interface (SPI) with multi-I/O, SPI clock polarity and phase modes 0 and 3
• Serial command subset and footprint compatible with S25FL-A, S25FL-K, S25FL-P, S25FL-S SPI families
• Multi I/O command subset and footprint compatible with S25FL-P, and S25FL-S SPI families
• Normal, fast, dual I/O, quad I/O, DDR quad I/O commands, burst wrap, continuous (XIP), QPI modes
• Serial flash discoverable parameters and common flash interface for configuration information
• Program suspend and resume
• Erase suspend and resume, erase status evaluation
• 100,000 program-erase cycles (minimum), 20 year data retention (minimum)
• 24-ball BGA package, industrial plus temperature range from -40°C to +105°C