IS42S16160J-7BLI

IS42S16160J-7BLI is a 256Mb synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. It is high speed CMOS, dynamic random-access memory designed to operate in 3.3V Vdd and 3.3V Vddq memory systems containing 268,435,456 bits. Internally configured as a quad-bank DRAM with a synchronous interface. The 256Mb SDRAM includes an AUTO REFRESH MODE, and a power-saving, power-down mode. All signals are registered on the positive edge of the clock signal, CLK. All inputs and outputs are LVTTL compatible. The 256Mb SDRAM has the ability to synchronously burst data at a high data rate with automatic column-address generation, the ability to interleave between internal banks to hide precharge time and the capability to randomly change column addresses on each clock cycle during burst access.

• Fully synchronous; all signals referenced to a positive clock edge
• Internal bank for hiding row access/precharge, LVTTL interface
• Single power supply is 3.3V ± 0.3V
• Programmable burst sequence: sequential/interleave
• Auto refresh (CBR), self refresh, random column address every clock cycle
• Programmable active-low CAS latency (2, 3 clocks), 143MHz frequency, 7ns speed
• Burst read/write and burst read/single write operations capability
• Burst termination by burst stop and precharge command
• 54-ball BGA package
• Industrial temperature rating range from -40°C to +85°C