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数量 | 价钱 (含税) |
---|---|
1+ | CNY100.210 (CNY113.2373) |
10+ | CNY92.810 (CNY104.8753) |
25+ | CNY91.550 (CNY103.4515) |
50+ | CNY90.430 (CNY102.1859) |
100+ | CNY80.570 (CNY91.0441) |
250+ | CNY78.850 (CNY89.1005) |
产品概述
IS42S16320F-7BLI is a 512Mb synchronous DRAM that achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. It is a high-speed CMOS, dynamic random-access memory designed to operate in either 3.3V Vdd/Vddq or 2.5V Vdd/Vddq memory systems, depending on the DRAM option. Internally configured as a quad-bank DRAM with a synchronous interface. The 512Mb SDRAM (536,870,912 bits) includes an AUTO REFRESH MODE, and a power-saving, power-down mode. All signals are registered on the positive edge of the clock signal, CLK. All inputs and outputs are LVTTL compatible. It has the ability to synchronously burst data at a high data rate with automatic column-address generation, the ability to interleave between internal banks to hide precharge time and the capability to randomly change column addresses on each clock cycle during burst access.
- Fully synchronous; all signals referenced to a positive clock edge
- Internal bank for hiding row access/precharge
- LVTTL interface, programmable burst sequence: sequential/interleave
- Auto refresh (CBR), self refresh, 8K refresh cycles every 64ms
- Random column address every clock cycle, programmable active-low CAS latency (2, 3 clocks)
- Burst read/write and burst read/single write operations capability
- Burst termination by burst stop and precharge command
- 143MHz frequency, 7ns speed
- 54-ball BGA package
- Industrial temperature rating range from -40°C to +85°C
技术规格
SDR
32M x 16位
BGA
3.3V
-40°C
IS42S
No SVHC (16-Jul-2019)
512Mbit
143MHz
54引脚
表面安装
85°C
MSL 3 - 168小时
技术文档 (1)
法律与环境
进行最后一道重要生产流程所在的地区原产地:Taiwan
进行最后一道重要生产流程所在的地区
RoHS
RoHS
产品合规证书