25LC256-I/P

The 25LC256-I/P is a 256kB high temperature SPI Serial EEPROM. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a Chip Select (CS) input. Communication to the device can be paused via the hold pin (HOLD). While the device is paused, transitions on its inputs will be ignored, with the exception of Chip Select, allowing the host to service higher priority interrupts.

• Low-power CMOS technology
• Byte and page-level write operations
• Self-timed erase and write cycles (6ms maximum)
• Block write protection - Protect none, 1/4, 1/2 or all of array
• Built-in write protection - Power-on/off data protection circuitry and write enable latch
• Sequential read
• <gt/>1M erase/write cycles Endurance
• <gt/>200 years Data retention
• <gt/>4000V ESD protection

警告

静电敏感设备, 在处理设备时请采取适当的预防措施.