74LVC07AD,118

74LVC07AD,118 is a hex buffer with open-drain outputs. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in mixed 3.3V and 5V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. It complies with JEDEC standard (JESD8-7A (1.65V to 1.95V), JESD8-5A (2.3V to 2.7V), JESD8-C/JESD36 (2.7V to 3.6V). It also features ESD protection (HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000V, CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000V.

• 5V tolerant inputs and outputs (open-drain) for interfacing with 5V logic
• Wide supply voltage range from 1.65V to 5.5V
• CMOS low power consumption, direct interface with TTL levels
• Overvoltage tolerant inputs to 5.5V
• Input leakage current is ±0.1μA typ at (VI = 5.5V or GND; VCC = 1.65V to 5.5V, -40°C to +85°C)
• Supply current is 0.1μA typical at (VI = VCC or GND; IO = 0A; VCC = 5.5V, -40°C to +85°C)
• Input capacitance is 5pF typical at (VCC = 0V to 5.5V; VI = GND to VCC, -40°C to +85°C)
• OFF-state to LOW propagation delay is 8ns typical at (VCC = 1.2V, -40°C to +85°C)
• Operating temperature range from -40°C to +125°C
• SO14 package

警告

Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.