产品信息
产品概述
The SN74LS393D is a 4bit dual binary counter contains eight flip-flops and additional gating to implement two individual four-bit counters. It incorporates dual divide-by-two and divide-by-five counter, which can be used to implement cycle lengths equal to any whole and/or cumulative multiples of 2 and/or 5 up to divide-by-100. When connected as a bi-quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output stage. It comprises two independent four-bit binary counters each having a clear and a clock input. It has parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals.
- Direct clear for each 4bit counter
- Buffered outputs reduce possibility of collector commutation
- Green product and no Sb/Br
技术规格
74LS393
35MHz
SOIC
14引脚
5.25V
74393
70°C
MSL 1 -无限制
二进制
15
SOIC
4.75V
74LS
0°C
-
No SVHC (27-Jun-2018)
技术文档 (1)
法律与环境
进行最后一道重要生产流程所在的地区原产地:Malaysia
进行最后一道重要生产流程所在的地区
RoHS
RoHS
产品合规证书