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SN74LVC2G125DCUR

缓冲器, 74LVC2G125, 1.65 V至5.5 V, VSSOP-8

TEXAS INSTRUMENTS SN74LVC2G125DCUR
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制造商产品编号:
SN74LVC2G125DCUR
库存编号
3006223

产品概述

The SN74LVC2G125DCUR is a dual Bus Buffer Gate designed for 1.65 to 5.5V VCC operation. This device features dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is high. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This device contains dual buffer gate device with output enable control and performs the Boolean function Y = A.
  • IOFF Supports live insertion, partial-power-down mode and back-drive protection
  • Allows down voltage translation
  • Can be used as a down translator to translate inputs from 5.5V down to the VCC level
  • Inputs accept voltages to 5.5V
  • Latch-up performance exceeds 250mA per JESD 17
  • 4.3ns at 3.3V Propagation delay (tpd)
  • 10µA ICC Low power consumption
  • ±24mA Output drive at 3.3 V
  • <0.8V at VCC = 3.3V, TA = 25°C VOLP (output ground bounce)
  • >2V at VCC = 3.3V, TA = 25°C VOHV (output VOH undershoot)
  • Green product and no Sb/Br

应用

工业, 通信与网络, 自动化与过程控制, 国防, 军用与航空, 电机驱动与控制, 成像, 视频和目视

警告

Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.

产品信息

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:
缓冲、非反相

:
74LVC2G125

:
VSSOP

:
8引脚

:
1.65V

:
5.5V

:
74LVC

:
742G125

:
-40°C

:
85°C

:
-

:
-

:
MSL 1 -无限制
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11,792 有货 需要更多?

11,792 UK 有库存,可在 4-5 个工作日内交货

CNY2.85 ( CNY3.22  含增值税)

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单件(切割供应)
多件: 5 最低: 5
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