LMH0341SQE/NOPB

The LMH0341SQE/NOPB is a 3Gbps SDI Deserializer with loop through and LVDS interface. It supports 5-bit LVDS interfaces with FPGAs. When paired with a host FPGA the LMH0341 automatically detects the incoming data rate and decodes the raw 5-bit data words compliant to any of the following standards: DVB-ASI, SMPTE 259M, SMPTE 292M or SMPTE 424M. The interface between the LMH0341 and the host FPGA consists of a 5-bit wide LVDS bus, an LVDS clock and a SMBus interface. No external VCOs or clocks are required. The LMH0341 CDR detects the frequency from the incoming data stream, generates a clean clock and transmits both clock and data to the host FPGA. The LMH0341 includes a serial reclocked loop through with integrated SMPTE compliant cable driver. Refer to for a complete listing of single channel deserializers offered in this family.

• Output compliant with SMPTE 259M-C, SMPTE 292M, SMPTE 424M and DVB-ASI
• 5-bit LVDS Interface
• No external VCO or clock ref required
• Reclocked serial loop through with cable driver
• Power down mode
• 0.6 UI minimum input jitter tolerance
• 590mW Typical power dissipation
• Green product and no Sb/Br