产品信息
产品概述
The SN74LVC162244ADGGR is a 16-bit Buffer/Driver with 3-state outputs. It is also designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs. Inputs can be driven from either 3.3/5V devices. This feature allows the use of this device as a translator in a mixed 3.3/5V system environment. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver.
- IOFF Supports live insertion, partial power down mode and back drive protection
- Latch-up performance exceeds 250mA per JESD 17
- Inputs accept voltages to 5.5V
- 4.4ns at 3.3V Propagation delay (tpd)
- <lt/>0.8V at VCC = 3.3V, TA = 25°C VOLP (output ground bounce)
- <gt/>2V at VCC = 3.3V, TA = 25°C VOHV (output VOH undershoot)
- Green product and no Sb/Br
技术规格
缓冲、非反相
TSSOP
48引脚
3.6V
7416244
85°C
-
No SVHC (27-Jun-2018)
74LVC16244
TSSOP
1.65V
74LVC
-40°C
-
MSL 1 -无限制
法律与环境
进行最后一道重要生产流程所在的地区原产地:Malaysia
进行最后一道重要生产流程所在的地区
RoHS
RoHS
产品合规证书