AD5373BSTZ

AD5373BSTZ contains 32 14bit DACs. This device provides buffered voltage outputs with a nominal span of 4× the reference voltage. The gain and offset of each DAC can be independently trimmed to remove errors. It offers guaranteed operation over a wide supply range: VSS from -16.5V to -4.5V and VDD from 9V to 16.5V. The output amplifier headroom requirement is 1.4V operating with a load current of 1mA. It has a high-speed serial interface that is compatible with SPI, QSPI™, MICROWIRE™, and DSP interface standards and can handle clock speeds of up to 50MHz. The DAC registers are updated on the reception of new data. All the outputs can be updated simultaneously by taking the LDAC input low. Each channel has a programmable gain and an offset adjust register. Applications include level setting in automatic test equipment (ATE), variable optical attenuators (VOA), optical switches, industrial control systems, and instrumentation.

• 14bits resolution, 4 × VREF (12V) nominal output span, 32 output channels
• Linearity error is ±1LSB, gain error is 0.1% FSR
• Differential nonlinearity is ±1LSB maximum at (DVCC = 2.5V to 5.5V; VDD = 9V to 16.5V)
• VOUTx temperature coefficient is 5ppm FSR/°C typical at (DVCC = 2.5V to 5.5V; VDD = 9V to 16.5V)
• Load current is ±1mA maximum at (DVCC = 2.5V to 5.5V; VDD = 9V to 16.5V)
• Power dissipation (unloaded) is 250mW typical at (VSS = -8V, VDD = 9.5V, DVCC = 2.5V)
• Slew rate is 1V/μs typical at (DVCC = 2.5V; VDD = 15V; VSS = -15V)
• Output noise spectral density is 250nV/√Hz typical at (10KHz, VREF0 = VREF1 = 0V)
• Digital-to-analogue glitch energy is 5nV-s typical at (DVCC = 2.5V; VDD = 15V; VSS = -15V)
• Operating temperature range from -40°C to +85°C, 64-lead LQFP package

注释

ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party