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数量 | 价钱 (含税) |
---|---|
10+ | CNY46.230 (CNY52.2399) |
25+ | CNY40.900 (CNY46.217) |
100+ | CNY35.140 (CNY39.7082) |
250+ | CNY34.340 (CNY38.8042) |
500+ | CNY33.540 (CNY37.9002) |
1500+ | CNY33.200 (CNY37.516) |
产品信息
产品概述
AD5687RBCPZ-RL7 is a nanoDAC+ family low power, dual buffered voltage output digital-to-analogue converter (DAC). It also incorporates a power-on reset circuit and a RSTSEL pin that ensure that the DAC outputs power up to zero scale or midscale and remain there until a valid write takes place. Each part contains a per channel power-down feature that reduces the current consumption of the device to 4μA at 3V while in power-down mode. It uses a versatile serial peripheral interface (SPI) that operates at clock rates upto 50MHz. Application includes optical transceivers, base station power amplifiers, process control (PLC I/O cards) industrial automation, data acquisition systems.
- 12bit minimum resolution (VDD = 2.7V to 5.5V), ±1LSB max INL accuracy (VDD = 2.7V to 5.5V)
- Internal reference
- Reference tempco is ±5ppm/°C (max)
- 0.4mV typical zero-code error (All 0s loaded to DAC register, VDD = 2.7V to 5.5V)
- Offset error is +0.1% of FSR typical (All 1s loaded to DAC register, VDD = 2.7V to 5.5V)
- Full-scale error is +0.01% of FSR typical (VDD = 2.7V to 5.5V)
- Gain error is ±0.02% of FSR typical (VDD = 2.7V to 5.5V)
- Total unadjusted error is ±0.01% of FSR typical (External reference; gain = 2; TSSOP)
- 0.15mV/V DC power supply rejection ratio typical (DAC code = midscale, VDD = 5V ±10%)
- 16-Lead LFCSP-WQ package, temperature range from -40°C to +105°C
注释
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
技术规格
12bit
3线, 串行, SPI
LFCSP-EP
-
105°C
-
No SVHC (21-Jan-2025)
-
2.7V 至 5.5V
16引脚
-40°C
Dual 12-Bit Voltage Output DACs
MSL 3 - 168小时
技术文档 (1)
法律与环境
进行最后一道重要生产流程所在的地区原产地:Philippines
进行最后一道重要生产流程所在的地区
RoHS
RoHS
产品合规证书