AD7822BNZ

AD7822BNZ is a high speed, 1-channel, sampling ADC. It combines the convert start and power-down functions at one pin, that is, the active-low CONVST pin. This allows a unique automatic power-down at the end of a conversion to be implemented. The logic level on the active-low CONVST pin is sampled after the end of a conversion when an active-low EOC (end of conversion) signal goes high. If it is logic low at that point, the ADC is powered down. The parallel interface is designed to allow easy interfacing to microprocessors and DSPs. Using only address decoding logic, the parts are easily mapped into the microprocessor address space. It is used in applications such as data acquisition systems, DSP front ends, disk drives, mobile communication systems, subsampling applications.

• Signal to (noise + distortion) ratio is 48dB minimum at (VDD = 3V ±10%, VDD = 5V ±10%)
• Integral nonlinearity is ±0.75LSB maximum at (VDD = 3V ±10%, VDD = 5V ±10%)
• Differential nonlinearity is ±0.75LSB maximum at (VDD = 3V ±10%, VDD = 5V ±10%)
• On-chip track-and-hold, on-chip reference (2.5V), automatic power-down at the end of conversion
• Gain error is ±2LSB maximum at (VDD = 3V ±10%, VDD = 5V ±10%, GND = 0V)
• Temperature coefficient is 50ppm/°C typical at (VDD = 3V ±10%, VDD = 5V ±10%, GND = 0V)
• Track-and-hold acquisition time is 200ns maximum at (VDD = 3V ±10%, VDD = 5V ±10%)
• Conversion time is 420ns maximum at (VDD = 3V ±10%, VDD = 5V ±10%, GND = 0V)
• Offset error is ±1LSB maximum at (VDD = 3V ±10%, VDD = 5V ±10%, GND = 0V)
• Operating temperature range from -40°C to +85°C, 20-lead PDIP package

注释

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