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数量 | 价钱 (含税) |
---|---|
10+ | CNY80.280 (CNY90.7164) |
25+ | CNY72.940 (CNY82.4222) |
100+ | CNY64.730 (CNY73.1449) |
250+ | CNY63.440 (CNY71.6872) |
500+ | CNY62.640 (CNY70.7832) |
1500+ | CNY61.560 (CNY69.5628) |
产品信息
产品概述
ADCLK948 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter. The device has two selectable differential inputs via the IN-SEL control pin. Both inputs are equipped with centre tapped, differential, 100 ohm on-chip termination resistors. The inputs accept dc-coupled LVPECL, CML, 3.3V CMOS (single-ended), and ac-coupled 1.8V CMOS, LVDS, and LVPECL inputs. Application includes low jitter clock distribution, clock and data signal restoration, level translation, wireless communications, wired communications, medical and industrial imaging, ATE and high performance instrumentation.
- 2 selectable differential inputs, on-chip input terminations
- Input differential range from 0.4V to 3.4V p-p (±1.7V between input pins)
- 50 ohm typical single-ended mode (VCC -VEE = 3.3V and TA = 25°C)
- 100 ohm typical differential mode (VCC -VEE = 3.3V and TA = 25°C)
- 50Kohm common mode (open VTx, VCC -VEE = 3.3V and TA = 25°C)
- 20µA typical input bias current (VCC -VEE = 3.3V and TA = 25°C)
- 10mV typical hysteresis (VCC -VEE = 3.3V and TA = 25°C)
- 4.8GHz maximum output frequency typical (VCC -VEE = 3.3V and TA = 25°C)
- Propagation delay is 245ps maximum at (VICM = 2V, VID = 1.6V p-p)
- 32 lead LFCSP package, operating temperature range from -40°C to +85°C
注释
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
技术规格
扇出缓冲
8输出
3.63V
32引脚
85°C
-
No SVHC (21-Jan-2025)
4.8GHz
2.97V
LFCSP-EP
-40°C
-
MSL 3 - 168小时
技术文档 (1)
法律与环境
进行最后一道重要生产流程所在的地区原产地:Philippines
进行最后一道重要生产流程所在的地区
RoHS
RoHS
产品合规证书