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数量 | 价钱 (含税) |
---|---|
1+ | CNY26.580 (CNY30.0354) |
10+ | CNY18.010 (CNY20.3513) |
25+ | CNY16.620 (CNY18.7806) |
100+ | CNY14.430 (CNY16.3059) |
250+ | CNY11.860 (CNY13.4018) |
1000+ | CNY9.150 (CNY10.3395) |
3000+ | CNY8.720 (CNY9.8536) |
产品信息
产品概述
ADN4661BRZ-REEL7 is a single, CMOS, low-voltage differential signalling (LVDS) line driver offering data rates of over 600Mbps (300MHz) and ultra-low power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. The device accepts low voltage TTL/CMOS logic signals and converts them to a differential current output of typically ±3.1mA for driving a transmission medium such as a twisted pair cable. The ADN4661 and a companion LVDS receiver offer a new solution to high-speed point-to-point data transmission and a low-power alternative to emitter-coupled logic (ECL) or positive-emitter-coupled logic (PECL). Typical applications are backplane data transmission, cable data transmission, clock distribution.
- ±15KV ESD protection on output pins, flow-through pinout simplifies PCB layout
- 3.3V power supply, conforms to TIA/EIA-644 LVDS standards
- Interoperable with existing 5V LVDS receivers
- Offset voltage is 1.2V typ at VCC=3V to 3.6V; RL=100 ohm; CL=15pF to GND
- Differential output voltage is 355mV typ at VCC=3V to 3.6V; RL=100 ohm; CL=15pF to GND
- Power-off leakage current is ±1μA typ at VOUT=VCC or GND, VCC=0V
- Rise time is 0.5ns typ at VCC=3V to 3.6V; RL=100 ohm; CL=15pF to GND
- Maximum operating frequency is 350MHz typ at VCC=3V to 3.6V; RL=100 ohm; CL=15pF to GND
- 8-lead standard small outline package [SOIC-N]
- Temperature range from -40°C to +85°C
注释
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
技术规格
LVDS 差分线性驱动器
85°C
3.6V
8引脚
LVDS
-
MSL 1 -无限制
-40°C
3V
NSOIC
CMOS, TTL
1bit
-
No SVHC (21-Jan-2025)
法律与环境
进行最后一道重要生产流程所在的地区原产地:Philippines
进行最后一道重要生产流程所在的地区
RoHS
RoHS
产品合规证书