ADP1740ACPZ-1.0-R7

ADP1740ACPZ-1.0-R7 is a low dropout (LDO) CMOS linear regulator that operates from 1.6V to 3.6V and provides up to 2A of output current. These low VIN/VOUT LDOs are ideal for regulation of nanometre FPGA geometries operating from 2.5V down to 1.8V I/O rails and for powering core voltages down to 0.75 V. Using an advanced, proprietary architecture, the ADP1740 provide high power supply rejection ratio (PSRR) and low noise, and achieve excellent line and load transient response with only a small 4.7µF ceramic output capacitor. Application includes server computers, memory components, telecommunications equipment, network equipment, DSP/FPGA/microprocessor supplies, instrumentation equipment/data acquisition systems.

• Input voltage range from 1.6V to 3.6V, stable with small 4.7µF ceramic output capacitor
• Excellent load and line transient response, current-limit and thermal overload protection
• Power-good indicator, logic-controlled enable, reverse current protection, 1V output voltage
• Operating supply current is 90µA typical at (IOUT = 500µA, TA = 25°C)
• Shutdown current is 2µA typical at (EN = GND, VIN = 3.6V, TA = 25°C)
• Fixed output voltage accuracy is +1% maximum at (IOUT = 100mA, TA = 25°C)
• Dropout voltage is 10mV typical at (IOUT = 100mA, VOUT ≥ 1.8V)
• Output noise is 23µV rms typical at (10Hz to 100KHz, VOUT = 0.75V)
• Power supply rejection ratio is 65dB typical at (1KHz, VOUT = 0.75V, TA = 25°C)
• Operating junction temperature range from -40°C to +125°C, 16-lead LFCSP-WQ package

注释

ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party