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数量 | 价钱 (含税) |
---|---|
1+ | CNY280.210 (CNY316.6373) |
10+ | CNY245.150 (CNY277.0195) |
25+ | CNY228.130 (CNY257.7869) |
100+ | CNY211.110 (CNY238.5543) |
250+ | CNY210.970 (CNY238.3961) |
产品信息
产品概述
ADRF6821 is a highly integrated, dual radio frequency (RF) input, zero intermediate frequency (IF)/low IF RFIC receiver with a quadrature demodulator, digital step attenuator (DSA), IF linear amplifiers, an integrated, fractional-N phase-locked loop (PLL), and a low phase noise, multicore, voltage controlled oscillator (VCO). The RFIC is ideally suited for communication digital predistortion (DPD) systems. The high isolation 2:1RF switch and on-chip wideband RF balun enable the device to support two single-ended, 50 ohm terminated RF inputs. A programmable attenuator ensures an optimal differential RF input level to the high linearity demodulator core. The integrated attenuator offers an attenuation range of 15dB with a step size of 1dB. It is used in application like cellular W CDMA/GSM/LTE, DPD receivers, microwave, point to point radios etc.
- DPD receiver with integrated fractional-N PLL
- RF input frequency range is 450MHz to 2800MHz
- Internal LO input frequency range is 450MHz to 2800MHz
- Dual RF inputs with SPDT absorptive RF switches
- Integrated VCO to cover complete RF input range
- Digital programmable LO phase offset and dc nulling
- Programmable via 4-wire SPI
- Operating temperature is -40°C to +105°C
- Package style is 56-lead lead frame chip scale [LFCSP]
注释
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
技术规格
450MHz
3.1V
LFCSP-EP
-40°C
-
No SVHC (21-Jan-2025)
2.8GHz
3.5V
56引脚
105°C
MSL 3 - 168小时
技术文档 (1)
法律与环境
进行最后一道重要生产流程所在的地区原产地:Philippines
进行最后一道重要生产流程所在的地区
RoHS
RoHS
产品合规证书