HMC749LC3C

HMC749LC3C is a T Flip-Flop w/reset designed to support clock frequencies as high as 26GHz. During normal operation, with the reset pin not asserted, the output toggles from its prior state on the positive edge of the clock. This results in a divide-by-two function of the clock input. Asserting the reset pin forces the Q output low regardless of the clock edge state (asynchronous reset assertion). Reversing the clock inputs allows for negative-edge-triggered applications. All differential inputs to the HMC749LC3C are CML and terminated on-chip with 50 ohms to the positive supply, Vcc, and may be AC or DC coupled. The differential CML outputs are source terminated to 50 ohms and may also be AC or DC coupled. Applications include serial data transmission up to 26Gbps, high-speed frequency divider (up to 26GHz), broadband test & measurement, RF ATE applications.

• Differential & single-ended operation, 3.3V single supply voltage
• Power supply current is 82mA typical at (TA = +25°C)
• Maximum clock rate is 26GHz typical at (TA = +25°C)
• Input return loss is 10dB typical at (frequency <13GHz, TA = +25°C)
• Output rise/fall time is 18/17ps typical at (differential, 20% - 80%, TA = +25°C)
• 95ps typical propagation delay clock to Q, td at (TA = +25°C)
• Random jitter Jr is 0.2ps rms maximum at (TA = +25°C)
• Output amplitude is 550mVp-p typical at (single-ended, peak-to-peak)
• Operating temperature range from -40°C to +85°C
• 16-lead ceramic SMT package

注释

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