HMC905LP3ETR

HMC905LP3ETR is a SiGe BiCMOS low-noise programmable frequency divider. This circuit can be programmed to divide from N = 1 to N = 4 in the 400MHz to 6GHz input frequency range. The high-level output power (up to 6dBm single-ended) with a very low SSB phase noise and 50% duty cycle makes this device ideal for low noise clock generation, LO generation, and LO drive applications. Configurable bias and output power controls allow current consumption and output power control. This device incorporates a power-down feature, good input-to-output isolation, and fast start-up time. The HMC905LP3E can be included in fast-switching “ping-pong” applications. Applications include LO generation with low noise floors, software-defined radios, clock generators, fast-switching synthesizers, military applications, test equipment, and sensors.

• Single-ended input RF input frequency range from 400 to 6000MHz
• Output power (single-ended out) is 3dBm typical at (TA = +25°C)
• SSB phase noise is -150dBc/Hz typical at (10KHz offset, TA = +25°C)
• Start-up time is 200ns typical at (EN bit from OFF to ON state (0V to Vcc))
• Power down time is 20ns typical at (EN bit from ON to OFF state (Vcc to 0V))
• Setting time at division ratio change is 25ns typical at (TA = +25°C)
• Operating temperature range from -40°C to +85°C
• 16-lead SMT package

注释

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