CY7C1021D-10ZSXI

The CY7C1021D-10ZSXI is a 1MB high performance CMOS Static Random Access Memory (SRAM) organized as 65536 words by 16-bit. This device has an automatic power down feature that significantly reduces power consumption when deselected. The input and output pins are placed in a high impedance state when the device is deselected, outputs are disabled, BHE and BLE are disabled or during a write operation. Write to the device by taking chip enable and write enable inputs LOW. If byte low enable is LOW, then data from I/O pins, is written into the location specified on the address pins. If byte high enable is LOW, then data from I/O pins is written into the location specified on the address pins. Read from the device by taking chip enable and output enable LOW while forcing the write enable HIGH. If byte low enable is LOW, then data from the memory location specified by the address pins appears on I/O0 to I/O7. If byte high enable is LOW, then data from memory appears on I/O8 to I/O15.

• Pin and function-compatible with CY7C1021B
• High speed - 10ns
• Low active power
• Low CMOS standby power
• 2V Data retention
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Independent control of upper and lower bits