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569 件可于 5-6 个工作日内送达(英国 库存)
数量 | 价钱 (含税) |
---|---|
1+ | CNY53.290 (CNY60.2177) |
10+ | CNY49.050 (CNY55.4265) |
25+ | CNY47.690 (CNY53.8897) |
包装规格:每个
最低: 1
多件: 1
CNY53.29 (CNY60.22 含税)
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产品信息
制造商MICRON
制造商产品编号MT48LC2M32B2B5-6A IT:J
库存编号4050867
技术数据表
DRAM类型SDR
存储密度64Mbit
记忆配置2M x 32位
时钟频率最大值167MHz
IC 外壳 / 封装VFBGA
针脚数90引脚
额定电源电压3.3V
芯片安装表面安装
工作温度最小值-40°C
工作温度最高值85°C
产品范围-
产品概述
MT48LC2M32B2B5-6A IT:J is a SDR SDRAM. It uses a 64Mb SDRAM and a high-speed CMOS, dynamic random-access memory containing 67,108,864 bits. It is internally configured as a quad-bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the x4’s 67,108,864-bit banks are organized as 8192 rows by 2048 columns by 4 bits. Each of the 16,777,216-bit banks are organized as 2048 rows by 256 columns by 32bits. It supports CAS latency (CL) of 1, 2, and 3.
- Operating supply voltage range is 3V to 3.6V (VDD, VDDQ)
- 2Meg x 32 configuration (512K x 32 x 4 banks), PC100-compliant
- Packaging style is 90-ball VFBGA (8mm x 13mm)
- Clock frequency is 167MHz, auto refresh
- Industrial temperature range is –40˚C to +85˚C
- Fully synchronous to all signals registered on positive edge of system clock
- Internal pipelined operation; column address can be changed every clock cycle
- Internal banks for hiding row access/precharge
- Auto precharge, includes concurrent auto precharge and auto refresh modes
- LVTTL-compatible inputs and outputs
技术规格
DRAM类型
SDR
记忆配置
2M x 32位
IC 外壳 / 封装
VFBGA
额定电源电压
3.3V
工作温度最小值
-40°C
产品范围
-
存储密度
64Mbit
时钟频率最大值
167MHz
针脚数
90引脚
芯片安装
表面安装
工作温度最高值
85°C
技术文档 (1)
法律与环境
原产地:
进行最后一道重要生产流程所在的地区原产地:Taiwan
进行最后一道重要生产流程所在的地区
进行最后一道重要生产流程所在的地区原产地:Taiwan
进行最后一道重要生产流程所在的地区
税则号:85423239
US ECCN:EAR99
EU ECCN:NLR
RoHS 合规:是
RoHS
RoHS 邻苯二甲酸盐合规:是
RoHS
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产品合规证书
重量(千克):.000001