74AHC02D,118

74AHC02D,118 is a quad 2-input NOR gate. It is a high-speed Si-gate CMOS device and is pin-compatible with low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. It provides a quad 2-input NOR function. It features ESD protection (HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000V, CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000V).

• Balanced propagation delays. all inputs have a Schmitt-trigger action
• Inputs accept voltages higher than VCC, CMOS input level
• Supply voltage range from 2V to 5.5V
• Input leakage current is 0.1μA maximum at (VI=5.5V or GND;VCC = 0V to 5.5V, 25°C)
• Supply current is 2μA maximum at (VI=VCC or GND; IO = 0A;VCC = 5.5V, 25°C)
• Input capacitance is 3pF typical at (25°C)
• Propagation delay is 3.9ns typ at (VCC = 3V to 3.6V; CL = 15pF, 25°C)
• Operating temperature range from -40°C to +125°C
• SO14 package

警告

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