74AVCH8T245PW:118

74AVCH8T245PW:118 is a 8bit, dual supply transceiver that enables bidirectional level translation. It features two 8bit input-output ports (An and Bn), a direction control input (DIR), an output enable input (active-low OE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8V and 3.6V making the device suitable for translating between any of the low-voltage nodes (0.8V, 1.2V, 1.5V, 1.8V, 2.5V and 3.3V). Pins An, active-low OE, and DIR are referenced to VCC(A), and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An. The output enable input (active-low OE) can be used to disable the outputs so the buses are effectively isolated. The device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down.

• Complies with JEDEC standards, ESD protection
• Suspend mode, bus hold on data inputs
• Latch-up performance exceeds 100mA per JESD 78 Class II
• Inputs accept voltages upto 3.6V, IOFF circuitry provides partial power-down mode operation
• Input leakage current is ±0.025µA typical at (Tamb = 25°C)
• OFF-state output current is ±30µA maximum at (A or B port; VO = 0V or VCCO; VCC(A) = VCC(B) = 3.6V)
• Power-off leakage current is ±30μA maximum at (A port; VI or VO = 0V to 3.6V; VCC(A) = 0V)
• Supply current is 55μA maximum at (VCC(A) = 0.8V to 3.6V; VCC(B) = 0.8V to 3.6V)
• Operating temperature range from -40°C to +125°C
• TSSOP24 package

警告

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