产品信息
产品概述
The 74HC573D is an octal transparent D Latch pin compatible with low-power Schottky TTL (LSTTL). It features separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A LE input and an OE\ input are common to all latches. When LE is high, data at the Dn inputs enter the latches. In this condition, the latch is transparent, i.e. a latch output changes state each time its corresponding D input changes. When LE is low the latches store the information that was present at the D-inputs a set-up time preceding the high-to-low transition of LE. When OE\ is low, the contents of the 8 latches are available at the outputs. When OE\ is high, the outputs go to the high-impedance OFF-state. Operation of the OE\ input does not affect the state of the latch.
- Inputs and outputs on opposite sides of package allowing easy interface with microprocessors
- Useful as input or output port for microprocessors and microcomputers
- 3-state Non-inverting outputs for bus-oriented applications
- Common 3-state output enable input
- CMOS Input level
- Complies with JEDEC standard No. 7A
警告
Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.
技术规格
74HC573
三态
35mA
SOIC
2V
8位
74573
125°C
-
No SVHC (21-Jan-2025)
D型透明
14ns
SOIC
20引脚
6V
74HC
-40°C
-
MSL 1 -无限制
74HC573D,653 的替代之选
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法律与环境
进行最后一道重要生产流程所在的地区原产地:Netherlands
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RoHS
RoHS
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