74LVCH8T245PW,118

The 74LVCH8T245PW,118 is a 8-bit dual supply Translating Transceiver with 3-state outputs that enable bidirectional level translation. It features two data input-output ports, a direction control input, an output enable input (OE) and dual supply pins. Both VCC(A) and VCC(B) can be supplied at any voltage between 1.2 and 5.5V making the device suitable for translating between any of the low voltage nodes. Pins An, OE and DIR are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A port and B port are in the high-impedance OFF-state. Active bus hold circuitry in the 74LVCH8T245 holds unused or floating data inputs at a valid logic level.

• High noise immunity
• Suspend mode
• IOFF circuitry provides partial power-down mode operation
• Complies with JEDEC standards
• Latch-up performance exceeds 100mA per JESD 78B class II
• Low power consumption - 30μA maximum ICC
• ±24mA Output drive

警告

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