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数量 | 价钱 (含税) |
---|---|
5+ | CNY1.490 (CNY1.6837) |
50+ | CNY1.310 (CNY1.4803) |
100+ | CNY1.110 (CNY1.2543) |
500+ | CNY1.100 (CNY1.243) |
1000+ | CNY1.090 (CNY1.2317) |
产品概述
The HEF4013BT is a Dual D-type Flip-flop features independent set-direct input (SD), clear-direct input (CD), clock input (CP) and outputs (Q, Q). Data is accepted when CP is LOW and is transferred to the output on the positive-going edge of the clock. The active high asynchronous CD and SD inputs are independent and override the D or CP inputs. The outputs are buffered for best system performance. The clock input's Schmitt-trigger action makes the circuit highly tolerant of slower clock rise and fall times. It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS or another input.
- Tolerant of slow clock rise and fall times
- Fully static operation
- Standardized symmetrical output characteristics
- Complies with JEDEC standard JESD 13-B
警告
Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.
技术规格
HEF4013
30ns
2.4mA
SOIC
上升沿
4.5V
HEF4000
-40°C
-
MSL 1 -无限制
D
40MHz
SOIC
14引脚
互补
15.5V
4013
70°C
Flip-Flop
No SVHC (21-Jan-2025)
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法律与环境
进行最后一道重要生产流程所在的地区原产地:Netherlands
进行最后一道重要生产流程所在的地区
RoHS
RoHS
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