CD4071BE

CD4071BE is a CMOS OR gate. It provides the system designer with direct implementation of the positive-logic OR function and supplements the existing family of CMOS gates. It meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices".

• Medium-speed operation is 60ns typ (at VDD = 10V)
• 100% tested for quiescent current at 20V
• Maximum input current of 1µA at 18V over full package-temperature range
• Standardized, symmetrical output characteristics
• Supply voltage range from 3 to 18V (full package temperature range)
• Quiescent device current is 0.01µA typ (25°C)
• Propagation delay time is 125ns typ (5VDD, TA = 25°C)
• Transition time is 100ns typ (5VDD, TA = 25°C)
• Input capacitance is 5pF typ (any input, 5VDD, TA = 25°C)
• 14pins PDIP(N) package, operating temperature range from -55 to 125°C