MAX9206EAI+

MAX9206EAI+ is a 10-bit bus LVDS deserializer in a 28 pin SSOP package. The deserializer transforms a high-speed serial bus low-voltage differential signalling (BLVDS) data stream into 10-bit-wide parallel LVCMOS\LVTTL data and clock. The deserializer pairs with a serializer such as the MAX9205, which generates a serial BLVDS signal from 10-bit-wide parallel data. The deserializer combination reduces interconnect, simplifies PCB layout, and reduces board size. The MAX9206 receives serial data at 450Mbps, over board traces or twisted-pair cables. This device combines frequency lock, bit lock, and frame lock to produce a parallel-rate clock and word-aligned 10-bit data. Serialization eliminates parallel bus clock-to-data and data-to-data skew. A power-down mode reduces the typical supply current to less than 600µA. Upon power-up (applying power or driving active-low PWRDN high), the MAX9206 establishes a lock after receiving synchronization signals or serial data from the MAX9205.

• Stand-alone deserializer (vs. SerDes) ideal for unidirectional links
• Automatic clock recovery
• Allow hot insertion and synchronization without system interruption
• BLVDS serial input rated for point-to-point and bus applications
• Fast Pseudorandom lock
• High 720ps (p-p) jitter tolerance
• Low 30mA supply current
• 10bit parallel LVCMOS/LVTTL output
• Programmable output strobe edge
• Pin compatible to DS92LV1212A and DS92LV1224

注释

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