74LVC1G08FW5-7

74LVC1G08FW5-7 is a single 2-input positive AND gate with a standard push-pull output. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down. ESD protection tested per JESD 22 (Exceeds 200-V Machine Model (A115), Exceeds 2000-V Human Body Model (A114), Exceeds 1000-V Charged Device Model (C101)). Typical applications include voltage level shifting, general purpose logic, power down signal isolation, wide array of products ( PCs, networking, notebooks, netbooks, pdas, tablet computers, e-readers, computer peripherals, hard drives, CD/DVD ROM, TV, DVD, DVR, set top box, cell phones, personal navigation /GPS, MP3 players, cameras, video recorders).

• Supply voltage range from 1.65 to 5.5V
• CMOS low power consumption
• IOFF supports partial-power-down mode operation
• Inputs accept up to 5.5V
• Latch-up exceeds 100mA per JESD 78, Class I
• Direct interface with TTL levels
• 200µA max quiescent current
• 32mA maximum low level output current and -32mA maximum low level output current
• 6 pin 6X1-DFN1010 package
• Operating temperature range from -40 to +125°C